Changes between Version 31 and Version 32 of Tutorials/Edge Computing/Alveo Getting Started

Timestamp:

May 29, 2020, 4:33:39 PM (5 years ago)

Author:

prasanthi

Comment:

—

Tutorials/Edge Computing/Alveo Getting Started

@@ -94 +94 @@
 * Power cycle the node using omf offh and on commands. Once the node is on, ssh to the node.
 * Run lspci command to verify the updated firmware. The output now shows both the management and user functions.
-{{{
+{{{#!shell-session
 root@srv1-lg1:~# lspci -vd 10ee:
 d8:00.0 Processing accelerators: Xilinx Corporation Device 5000
@@ -140 +140 @@
 }}}
 Note the shell version installed on the FPGA(Flashable partition running on FPGA) matches with that installed on the host(Flashable partitions installed in system).
+
+* Use xbutil command to validate the card and the drivers. 
+{{{#!shell-session
+root@srv1-lg1:~# /opt/xilinx/xrt/bin/xbutil validate
+INFO: Found 1 cards
+
+INFO: Validating card[0]: xilinx_u200_xdma_201830_2
+INFO: == Starting AUX power connector check:
+INFO: == AUX power connector check PASSED
+INFO: == Starting PCIE link check:
+INFO: == PCIE link check PASSED
+INFO: == Starting verify kernel test:
+Host buffer alignment 4096 bytes
+Compiled kernel = /opt/xilinx/dsa/xilinx_u200_xdma_201830_2/test/verify.xclbin
+Error
+Exception:
+argument 1: <type 'exceptions.TypeError'>: Don't know how to convert parameter 1
+FAILED TEST
+
+ERROR: == verify kernel test FAILED
+INFO: Card[0] failed to validate.
+
+ERROR: Some cards failed to validate.
+}}}
+* In case card validation fails as above, relaod the drivers and try validating the card. The card is then ready to use.
+{{{#!shell-session
+root@srv1-lg1:~# rmmod xocl
+root@srv1-lg1:~# rmmod xclmgmt
+root@srv1-lg1:~# modprobe xocl
+root@srv1-lg1:~# modprobe xclmgmt
+root@srv1-lg1:~# /opt/xilinx/xrt/bin/xbutil validate
+INFO: Found 1 cards
+
+INFO: Validating card[0]: xilinx_u200_xdma_201830_2
+INFO: == Starting AUX power connector check:
+INFO: == AUX power connector check PASSED
+INFO: == Starting PCIE link check:
+INFO: == PCIE link check PASSED
+INFO: == Starting verify kernel test:
+INFO: == verify kernel test PASSED
+INFO: == Starting DMA test:
+Buffer Size: 256 MB
+Host -> PCIe -> FPGA write bandwidth = 8402.31 MB/s
+Host <- PCIe <- FPGA read bandwidth = 12156.5 MB/s
+INFO: == DMA test PASSED
+INFO: == Starting device memory bandwidth test:
+...........
+Maximum throughput: 52428 MB/s
+INFO: == device memory bandwidth test PASSED
+INFO: == Starting PCIE peer-to-peer test:
+P2P BAR is not enabled. Skipping validation
+INFO: == PCIE peer-to-peer test SKIPPED
+INFO: == Starting memory-to-memory DMA test:
+bank0 -> bank1 M2M bandwidth: 11990.1 MB/s
+bank0 -> bank2 M2M bandwidth: 12025.6 MB/s
+bank0 -> bank3 M2M bandwidth: 12038 MB/s
+bank1 -> bank2 M2M bandwidth: 12057.3 MB/s
+bank1 -> bank3 M2M bandwidth: 12025 MB/s
+bank2 -> bank3 M2M bandwidth: 12058.4 MB/s
+INFO: == memory-to-memory DMA test PASSED
+INFO: Card[0] validated successfully.
+
+INFO: All cards validated successfully.
+}}}
   
 * For more information on card start up, please refer https://www.xilinx.com/support/documentation/boards_and_kits/accelerator-cards/ug1301-getting-started-guide-alveo-accelerator-cards.pdf